285 Commits

Author SHA1 Message Date
Alex Shvartzkop
013aab58d6 Update golden ERC QA files after 316a9511e813af257af23f60642859fa623537d4 2025-08-21 12:30:38 +03:00
Columba Livia
4a99dc1a99 fix for issue 17429 - DRC exclusion instability
- backported from master
- fix for issue-17429 - DRC unnconnected items exclusion instability
  - new serialization format for unconnected items (MainID and AuxID
    last)
- RunOnUnconnectedItems sorts RN_NET edges for stability
- ResolveDRCExclusions now matches unconnected items by not matching on
      MainID and AuxID
2025-07-11 15:58:14 -07:00
Jon Evans
8b80853ad7 QA: Store SVGs, not PNGs
Different platforms/versions can result in very slight differences
when converting SVGs to PNGs for diffing them.
2025-06-14 16:56:47 -04:00
Jeff Young
0dde037ab9 Update CLI gold files with higher arc definition. 2025-05-13 14:19:00 +01:00
Jeff Young
19af8419b3 Update Cadstar gold file for increased precision.
(cherry picked from commit f54ae5246c8634f4c8416dfb3a3fb64b227183b3)
2025-05-13 10:10:31 +01:00
Wayne Stambaugh
4b009b0698 Fix ERC QA failures caused by hierarchical label root sheet test.
(cherry picked from commit bebc9669ad3913b07f33fa540558a80d1ccdfb1b)
2025-05-09 15:33:26 -04:00
Jeff Young
8ac578c788 DRCEpsilon is generic. Zone knockouts need more specific values.
Each knockout can be approximated, and each knockout
will have m_ExtraClearance added.  If a neck is
between two knockouts, it will be 2X the above
values narrower than expected.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/20361

(cherry picked from commit 96522c4113a8c799393fe057daa01fa86375793a)
2025-05-07 14:09:05 +01:00
Wayne Stambaugh
5544a315bd Use arc mid point for footprint library parity DRC testing.
The arc center is a pseudo coordinate which is calculated for drawing
purposes.  This mid point is fixed unless the arc is modified which
should result in more reliable arc parity footprint library DRC testing.

Also change EDA_SHAPE::Compare() to use the arc mid point.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/15917

(cherry picked from commit 11edaa6e4a256d69bc2f65240b9a7bc54daa481e)
2025-04-07 12:03:02 -04:00
Jon Evans
5b88f2509e Use stable sort ordering in ERC reports
Fixes https://gitlab.com/kicad/code/kicad/-/issues/20333


(cherry picked from commit fe22166d9f0da180c8ac645397fe663759147d6a)

Co-authored-by: Jon Evans <jon@craftyjon.com>
2025-03-16 11:22:06 -04:00
Jon Evans
dcc09a9e77 Improvements to kicad-cli test repeatability
(cherry picked from commit ca21a35bfca693abf8bca8080c0f107913fe2b09)
2025-02-22 14:08:55 -05:00
Seth Hillbrand
9e4204340f Fixup net-tie caching and add QA for netties
When building a net tie, all elements in the footprint that belong to
the net tie can be arbitrarily close to one another.  outside of the
footprint, connected items can be arbitrarily close to the tie element
but must respect the clearance values for elements that have nets
assigned to them

Fixes https://gitlab.com/kicad/code/kicad/-/issues/19933

(cherry picked from commit bff819edb08e3d303c695b79f990374d259e4d0a)
2025-02-13 14:45:40 -08:00
Ian McInerney
088e0e80a1 Fix layer writing/reading for copper zones
* Always enumerate layers - never use the wildcards
* Keep fills on layers the zone is actually on when loading

Fixes https://gitlab.com/kicad/code/kicad/-/issues/19775
2025-01-29 00:31:28 +00:00
John Beard
954ef70a8a QA: add a library-mode footprint load/test/save test
This is not only a useful place to hang regression tests,
but also allows to catch defects specific to loading or
saving footprints.

For example, it would catch:

Relates-To: https://gitlab.com/kicad/code/kicad/-/issues/19713
2025-01-24 02:11:06 +08:00
Jon Evans
975fe32fa7 Add a mechanism for using a mock config dir for QA tests 2025-01-18 13:40:38 -05:00
JamesJCode
baa0beec4d Update some pcbnew QA files to remove warning messages 2025-01-14 22:49:21 +00:00
Seth Hillbrand
bfb3875a68 Add additional handling for arc collisions
Provides nearest point calculation for circles, segments and rects

Fixes https://gitlab.com/kicad/code/kicad/-/issues/18203
2025-01-14 13:08:45 -08:00
Seth Hillbrand
00de67eea8 Properly handle cleanup for multiple collinear tracks
When we have multiple tracks that share a single anchor, they are
technically a node but should still be cleaned as they are collinear.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/19574
2025-01-09 12:10:23 -08:00
Marek Roszko
ae0dc97929 Add qa for cli sch erc 2025-01-04 22:32:53 -05:00
JamesJCode
0c76b723b4 Add ERC QA for wire bus entry unconnected / off grid 2025-01-03 18:13:30 +00:00
Seth Hillbrand
66ee4a1ddd Fix up Annular ring check
- Remove bespoke collide routine.  We should never rewrite these instead
  of using the geometry library
- Optimize check by creating unified geometry before colliding
- Make extra variable that we don't need but makes cherry-picks easier
  (min/maxAnnularWidth)

Fixes https://gitlab.com/kicad/code/kicad/-/issues/19325

(cherry picked from commit a611c72c27e1000afb385cc230f1c288309e4c16)
2024-12-23 08:38:45 -08:00
Jeff Young
a048acf9db Don't assume all things with mask layers are in a footprint.
In particular, tracks can now have mask layers.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/18878
2024-12-20 22:21:54 +00:00
JamesJCode
3a7aa7b660 Ensure deterministic ordering in cadstar netlist exporter
Also re-enable checking of exporter in qa_cli
2024-12-20 11:50:23 +00:00
JamesJCode
c9d74d24f0 Ensure deterministic ordering in orcadpcb2 netlist exporter
Fixes https://gitlab.com/kicad/code/kicad/-/issues/18822
2024-12-19 23:01:32 +00:00
Seth Hillbrand
41d4a8caab Adjust DRC clearance for net ties
Items that are part of net ties (pads and copper shapes that connect to
them) should allow connections from any net in the tie.  This prevents
clearance errors from being generated for matched nets

Fixes https://gitlab.com/kicad/code/kicad/-/issues/14008
2024-12-10 15:54:47 -08:00
Seth Hillbrand
ad985aff9d Check secondary driver names when merging
If two nets are joined by a global power pin but both have global labels
that override the net name, we still want them to be merged.  This
checks for all net names in the drivers when looking for subgraph
merging candidates

Fixes https://gitlab.com/kicad/code/kicad/-/issues/18092
2024-12-10 15:54:47 -08:00
Dhineshkumar S
57127f7d12 Add DRC warning for incorrectly mirrored text 2024-12-08 05:00:38 +00:00
Jon Evans
49d5e64428 API: Add initial definitions for dimensions 2024-11-29 21:18:51 -05:00
John Beard
44ca798925 Pcbnew IO: Use fill yes/no universally
There was a motion towards fill solid/none around
2020 (c.f. b31e97cfeda9b76a165854b98974d253e221e93b),
but it was only for PCB_SHAPE.

Use yes/no universally (solid/none parsing the same way
as currently). In future if there are other fill modes
for these shapes, they can use the same pattern as ZONEs
do now: (fill yes) (hatch etc ....) or similar.

Relates-To: https://gitlab.com/kicad/code/kicad/-/issues/15232
2024-11-29 20:17:51 +08:00
Jon Evans
af91519e06 API: Implement Deserialize for ZONE 2024-11-23 12:06:54 -05:00
Daniel Treffenstädt
81ecccb21c Fixed: Fewer ERC items for pin connection conflicts in larger set of conflicting pins 2024-11-22 23:26:31 +00:00
Jan Wichmann
30cebd17e0 Added ERC check for directive labels
Checks to see if directive labels are connected in the same manner that other labels are

Fixes: https://gitlab.com/kicad/code/kicad/-/issues/19075
2024-11-20 18:11:05 +00:00
Seth Hillbrand
64ff47c594 Handle edge cases in kissing zones
When zone kisses happen from different polygons, we need to be careful
not to use the different polygons for ear comparisons or prev/next
pointers

Fixes https://gitlab.com/kicad/code/kicad/-/issues/18654
2024-10-24 17:40:25 -07:00
JamesJCode
db072a524c Consolidation of Component Class implementation
- Moves functionality to FOOTPRINT class from BOARD_ITEM
- Renames DRC property from ComponentClass to Component_Class
- Adds DRC checks QA for A.Component_Class and a.hasComponentClass('x')
2024-10-24 20:11:35 +01:00
JamesJCode
98da64dce7 Fix multichannel QA 2024-10-10 02:25:29 +01:00
Jon Evans
56e0811516 Phase 2 of padstack support
CHANGED: PCB file format now supports saving/loading complex padstacks

CHANGED: PTH pads are now rendered per copper layer in the copper color;
         the PTH pad color is no longer used.

ADDED: support for importing complex pad stacks from Altium PCBs

Enforce padstack-aware access to pad properties across KiCad

Fixes https://gitlab.com/kicad/code/kicad/-/issues/8182
2024-10-01 19:55:03 -04:00
JamesJCode
d64a112971 Implement Component Classes
- Adds Component Class field to SCH_DIRECTIVE_LABEL
- Adds SCH_SYMBOLs to SCH_RULE_AREA item lists
- SCH_SYMBOLs resolve Component Class directives
- Netlist exporter / importer handles Component Class names
- Adds DRC expressions and functions
- Adds QA check for component class netlist export
2024-10-01 22:36:18 +01:00
Wayne Stambaugh
be72f22f54 Add check for schematic files shared by multiple projects.
This test was added to the SCHEMATIC object along with QA tests to verify
the test works as expected.
2024-09-27 13:09:50 -04:00
Seth Hillbrand
5e0abadb23 Reorganize layer numbering
F_Cu = 0
B_Cu = 2
Remaining internal copper layers are even and incrementing

Non-copper layers are odd and incrementing.

This means that we can no longer do things like:
for( PCB_LAYER_ID layer = F_Cu; layer <= B_Cu; ++layer)
Instead, we have the class LAYER_RANGE:
for( PCB_LAYER_ID layer : LAYER_RANGE( F_Cu, B_Cu) )

Similarly, gt/lt tests should not refer to the integer value of the
layer.  We have functions such as IsCopperLayer to test whether a layer
is copper or not.

When using the connectivity RTree, the third dimension is layer, so we
provide B_Cu with the special INT_MAX value, ensuring that elements
between F_Cu and B_Cu will be identified.  There is a new, special
function GetBoardLayer() for interfacing with CN_ITEMS

Similarly, PNS layers remain unchanged and sequential.  A set of
interface functions is provided to map PNS layers to Board layers and
back.  This allows the PNS_LAYER_RANGE to function as expected
2024-09-06 23:07:58 +00:00
Tomasz Wlostowski
c3e621bb69 qa: added test layout for the MULTICHANNEL_TOOL 2024-08-14 00:09:31 +02:00
JamesJCode
3a007b8dd7 Remove group_matched token from DRC skew rule
This is the default behaviour anyway
2024-07-30 14:41:06 +01:00
JamesJCode
5187ea721d Implement within_diff_pairs and group_matched DRC skew arguments
Enables DRC to calculate skew based on new arguments to skew
constraint DRC clauses:

Using (group_matched): calculate skew across all matching nets
Using (within_diff_pairs): calculate skew within every diff pair
   found within the matching nets

Additionally fixes DRC skew calculation to calculate skew relative
to the longest net in the skew check set (in line with PNS meander
placer calculations).
2024-07-29 15:28:39 +01:00
James J
7ce00e511b Multi-netclass support 2024-07-26 20:49:29 +00:00
JamesJCode
559854ec0f Add ERC check for dangling wire endpoints 2024-07-22 23:16:08 +01:00
JamesJCode
96977d44d9 Add ERC check for local and global labels with same name
Fixes https://gitlab.com/kicad/code/kicad/-/issues/9461
2024-07-21 23:45:02 +01:00
Seth Hillbrand
16f41a832c Fix issue with model parsing
Sometimes we don't get the data elements in order.  Use the stream name
to ensure we have the correct model.

Also give the parser a bit more memory to work with, avoiding unneeded
resizes
2024-07-16 17:39:49 -07:00
CraftedNightmare
ee78f3bf5b Changed ERC Label caps check to check Power Symbols
Power symbols are implicit labels in KiCad, so we should check for their
caps difference against other power symbols as well as against other
labels

Fixes https://gitlab.com/kicad/code/kicad/-/issues/16897
2024-07-11 18:45:35 +00:00
Seth Hillbrand
845130ba9e ADDED: pcbnew fill avoids kissing fills
Previously, fills could end up just barely touching, leading to DRC
errors even if there was enough room to fill the remaining space.  This
was due to how we shrink/expand the zones to remove small features.  By
adding a zero-width line between points that should be connected, we
expand back to the correct width.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/14130
2024-07-10 18:34:41 -07:00
Seth Hillbrand
4431246cbe ADDED: ERC Test for labels on multiple wires
When a label overlaps two or more wires, it is not clear which one it
should connect to.  This is an ERC warning

Fixes https://gitlab.com/kicad/code/kicad/-/issues/18346
2024-07-09 10:06:27 -07:00
Seth Hillbrand
234230801f Fixup Altium QA.
Apparently, Footprint export does not export the internal rule area
layers.  Saving directly does
2024-06-27 16:38:58 -07:00
Seth Hillbrand
51eb7aa5b5 Fixup for Altium pad/fill importer
The previous commit merged pads with copper areas.  This was appealing
but broke when the pad and the area were meant to have different
size/shape technical layers.  Small pads = Small paste.  Instead, we do
not merge the pads but we assign them to have the appropriate nets in
KiCad, allowing the same effective result but keeping the technical
layers correct
2024-06-27 13:49:16 -07:00