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Renamed constraint fanout_width to fanout_ratio

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Daniel Treffenstädt 2024-10-06 10:50:31 +02:00
parent 0580f57c71
commit 68d3e19a69
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GPG Key ID: 3D92CAF477537F3E
7 changed files with 10 additions and 11 deletions
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2
common/drc_rules.keywords
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@ -55,7 +55,7 @@ thermal_relief_gap
thermal_spoke_width thermal_spoke_width
track track
track_angle track_angle
pad_fanout_width pad_fanout_ratio
track_width track_width
track_segment_length track_segment_length
version version

4
pcbnew/dialogs/panel_setup_rules.cpp
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@ -271,7 +271,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
|| token == wxT( "track_width" ) || token == wxT( "track_width" )
|| token == wxT( "track_angle" ) || token == wxT( "track_angle" )
|| token == wxT( "track_segment_length" ) || token == wxT( "track_segment_length" )
|| token == wxT( "pad_fanout_width" ) || token == wxT( "pad_fanout_ratio" )
|| token == wxT( "via_count" ) || token == wxT( "via_count" )
|| token == wxT( "via_diameter" ) || token == wxT( "via_diameter" )
|| token == wxT( "zone_connection" ); || token == wxT( "zone_connection" );
@ -493,7 +493,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
"track_width|" "track_width|"
"track_angle|" "track_angle|"
"track_segment_length|" "track_segment_length|"
"pad_fanout_width|" "pad_fanout_ratio|"
"via_count|" "via_count|"
"via_diameter|" "via_diameter|"
"zone_connection" ); "zone_connection" );

2
pcbnew/dialogs/panel_setup_rules_help_2constraints.md
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@ -27,7 +27,7 @@
| `track_width` | min/opt/max | Checks the width of track and arc segments. An error will be generated for each segment that has a width below the `min` value (if specified) or above the `max` value (if specified).<br> | | `track_width` | min/opt/max | Checks the width of track and arc segments. An error will be generated for each segment that has a width below the `min` value (if specified) or above the `max` value (if specified).<br> |
| `track_angle` | min/opt/max | Checks the angle between two connected track segments. An error will be generated for each connected pair with an angle below the `min` value (if specified) or above the `max` value (if specified).<br> | | `track_angle` | min/opt/max | Checks the angle between two connected track segments. An error will be generated for each connected pair with an angle below the `min` value (if specified) or above the `max` value (if specified).<br> |
| `track_segment_length` | min/max | Checks the length of track and arc segments. An error will be generated for each segment that has a length below the `min` value (if specified) or above the `max` value (if specified).<br> | | `track_segment_length` | min/max | Checks the length of track and arc segments. An error will be generated for each segment that has a length below the `min` value (if specified) or above the `max` value (if specified).<br> |
| `pad_fanout_width` | max | Checks the width of the fanout for a pad stated as a percentage. An error will be generated for each connected track with a width above the `max` value (if specified).<br> | | `pad_fanout_ratio` | max | Checks the width of the fanout for a pad stated as a percentage. An error will be generated for each connected track with a width above the `max` value (if specified).<br> |
| `via_count` | max | Counts the number of vias on every net matched by the rule condition. If that number exceeds the constraint `max` value on any matched net, an error will be generated for that net.<br> | | `via_count` | max | Counts the number of vias on every net matched by the rule condition. If that number exceeds the constraint `max` value on any matched net, an error will be generated for that net.<br> |
| `via_dangling` | | Checks for vias that are unconnected or connected on only one layer. This constraint does not take a min/opt/max value. In combination with a severity clause, this constraint can be used to allow or disallow dangling vias in various conditions.<br> | | `via_dangling` | | Checks for vias that are unconnected or connected on only one layer. This constraint does not take a min/opt/max value. In combination with a severity clause, this constraint can be used to allow or disallow dangling vias in various conditions.<br> |
| `zone_connection` | `solid`<br>`thermal_reliefs`<br>`none` | Specifies the connection to be made between a zone and a pad.<br> | | `zone_connection` | `solid`<br>`thermal_reliefs`<br>`none` | Specifies the connection to be made between a zone and a pad.<br> |

2
pcbnew/drc/drc_rule.h
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@ -80,7 +80,7 @@ enum DRC_CONSTRAINT_T
CONNECTION_WIDTH_CONSTRAINT, CONNECTION_WIDTH_CONSTRAINT,
TRACK_ANGLE_CONSTRAINT, TRACK_ANGLE_CONSTRAINT,
VIA_DANGLING_CONSTRAINT VIA_DANGLING_CONSTRAINT
PAD_FANOUT_WIDTH_CONSTRAINT PAD_FANOUT_RATIO_CONSTRAINT,
}; };

4
pcbnew/drc/drc_rule_parser.cpp
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@ -518,7 +518,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
case T_track_width: c.m_Type = TRACK_WIDTH_CONSTRAINT; break; case T_track_width: c.m_Type = TRACK_WIDTH_CONSTRAINT; break;
case T_track_angle: c.m_Type = TRACK_ANGLE_CONSTRAINT; break; case T_track_angle: c.m_Type = TRACK_ANGLE_CONSTRAINT; break;
case T_track_segment_length: c.m_Type = TRACK_SEGMENT_LENGTH_CONSTRAINT; break; case T_track_segment_length: c.m_Type = TRACK_SEGMENT_LENGTH_CONSTRAINT; break;
case T_pad_fanout_width: c.m_Type = PAD_FANOUT_WIDTH_CONSTRAINT; break; case T_pad_fanout_ratio: c.m_Type = PAD_FANOUT_RATIO_CONSTRAINT; break;
case T_connection_width: c.m_Type = CONNECTION_WIDTH_CONSTRAINT; break; case T_connection_width: c.m_Type = CONNECTION_WIDTH_CONSTRAINT; break;
case T_annular_width: c.m_Type = ANNULAR_WIDTH_CONSTRAINT; break; case T_annular_width: c.m_Type = ANNULAR_WIDTH_CONSTRAINT; break;
case T_via_diameter: c.m_Type = VIA_DIAMETER_CONSTRAINT; break; case T_via_diameter: c.m_Type = VIA_DIAMETER_CONSTRAINT; break;
@ -560,7 +560,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
|| c.m_Type == MIN_RESOLVED_SPOKES_CONSTRAINT || c.m_Type == MIN_RESOLVED_SPOKES_CONSTRAINT
|| c.m_Type == TRACK_ANGLE_CONSTRAINT || c.m_Type == TRACK_ANGLE_CONSTRAINT
|| c.m_Type == VIA_DANGLING_CONSTRAINT || c.m_Type == VIA_DANGLING_CONSTRAINT
|| c.m_Type == PAD_FANOUT_WIDTH_CONSTRAINT; || c.m_Type == PAD_FANOUT_RATIO_CONSTRAINT;
allowsTimeDomain = c.m_Type == LENGTH_CONSTRAINT || c.m_Type == SKEW_CONSTRAINT; allowsTimeDomain = c.m_Type == LENGTH_CONSTRAINT || c.m_Type == SKEW_CONSTRAINT;

5
pcbnew/drc/drc_test_provider_pad_fanout_width.cpp
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@ -70,7 +70,7 @@ bool DRC_TEST_PROVIDER_PAD_FANOUT_WIDTH::Run()
return true; // continue with other tests return true; // continue with other tests
} }
if( !m_drcEngine->HasRulesForConstraintType( PAD_FANOUT_WIDTH_CONSTRAINT ) ) if( !m_drcEngine->HasRulesForConstraintType( PAD_FANOUT_RATIO_CONSTRAINT ) )
{ {
reportAux( wxT( "No pad fanout constraints found. Tests not run." ) ); reportAux( wxT( "No pad fanout constraints found. Tests not run." ) );
return true; // continue with other tests return true; // continue with other tests
@ -120,8 +120,7 @@ bool DRC_TEST_PROVIDER_PAD_FANOUT_WIDTH::Run()
{ {
continue; continue;
} }
auto constraint = m_drcEngine->EvalRules( PAD_FANOUT_RATIO_CONSTRAINT, pad, other,
auto constraint = m_drcEngine->EvalRules( PAD_FANOUT_WIDTH_CONSTRAINT, pad, other,
pad->GetLayer() ); pad->GetLayer() );
int constraintWidth = 0; int constraintWidth = 0;

2
pcbnew/tools/board_inspection_tool.cpp
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@ -454,7 +454,7 @@ void BOARD_INSPECTION_TOOL::InspectDRCError( const std::shared_ptr<RC_ITEM>& aDR
if( compileError ) if( compileError )
reportCompileError( r ); reportCompileError( r );
constraint = drcEngine->EvalRules( PAD_FANOUT_WIDTH_CONSTRAINT, a, b, layer, r ); constraint = drcEngine->EvalRules( PAD_FANOUT_RATIO_CONSTRAINT, a, b, layer, r );
r->Report( "" ); r->Report( "" );
r->Report( wxString::Format( _( "Resolved fanout width constraints: min %s; max %s." ), r->Report( wxString::Format( _( "Resolved fanout width constraints: min %s; max %s." ),