From 68d3e19a69f0f9f90d32c85809275ffdfb3a47bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Treffenst=C3=A4dt?= Date: Sun, 6 Oct 2024 10:50:31 +0200 Subject: [PATCH] Renamed constraint fanout_width to fanout_ratio --- common/drc_rules.keywords | 2 +- pcbnew/dialogs/panel_setup_rules.cpp | 4 ++-- pcbnew/dialogs/panel_setup_rules_help_2constraints.md | 2 +- pcbnew/drc/drc_rule.h | 2 +- pcbnew/drc/drc_rule_parser.cpp | 4 ++-- pcbnew/drc/drc_test_provider_pad_fanout_width.cpp | 5 ++--- pcbnew/tools/board_inspection_tool.cpp | 2 +- 7 files changed, 10 insertions(+), 11 deletions(-) diff --git a/common/drc_rules.keywords b/common/drc_rules.keywords index 85ecc4a127..859873db52 100644 --- a/common/drc_rules.keywords +++ b/common/drc_rules.keywords @@ -55,7 +55,7 @@ thermal_relief_gap thermal_spoke_width track track_angle -pad_fanout_width +pad_fanout_ratio track_width track_segment_length version diff --git a/pcbnew/dialogs/panel_setup_rules.cpp b/pcbnew/dialogs/panel_setup_rules.cpp index 54b1a18760..1a012d0e34 100644 --- a/pcbnew/dialogs/panel_setup_rules.cpp +++ b/pcbnew/dialogs/panel_setup_rules.cpp @@ -271,7 +271,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent ) || token == wxT( "track_width" ) || token == wxT( "track_angle" ) || token == wxT( "track_segment_length" ) - || token == wxT( "pad_fanout_width" ) + || token == wxT( "pad_fanout_ratio" ) || token == wxT( "via_count" ) || token == wxT( "via_diameter" ) || token == wxT( "zone_connection" ); @@ -493,7 +493,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent ) "track_width|" "track_angle|" "track_segment_length|" - "pad_fanout_width|" + "pad_fanout_ratio|" "via_count|" "via_diameter|" "zone_connection" ); diff --git a/pcbnew/dialogs/panel_setup_rules_help_2constraints.md b/pcbnew/dialogs/panel_setup_rules_help_2constraints.md index 4552d33f7e..6dce635059 100644 --- a/pcbnew/dialogs/panel_setup_rules_help_2constraints.md +++ b/pcbnew/dialogs/panel_setup_rules_help_2constraints.md @@ -27,7 +27,7 @@ | `track_width` | min/opt/max | Checks the width of track and arc segments. An error will be generated for each segment that has a width below the `min` value (if specified) or above the `max` value (if specified).
| | `track_angle` | min/opt/max | Checks the angle between two connected track segments. An error will be generated for each connected pair with an angle below the `min` value (if specified) or above the `max` value (if specified).
| | `track_segment_length` | min/max | Checks the length of track and arc segments. An error will be generated for each segment that has a length below the `min` value (if specified) or above the `max` value (if specified).
| -| `pad_fanout_width` | max | Checks the width of the fanout for a pad stated as a percentage. An error will be generated for each connected track with a width above the `max` value (if specified).
| +| `pad_fanout_ratio` | max | Checks the width of the fanout for a pad stated as a percentage. An error will be generated for each connected track with a width above the `max` value (if specified).
| | `via_count` | max | Counts the number of vias on every net matched by the rule condition. If that number exceeds the constraint `max` value on any matched net, an error will be generated for that net.
| | `via_dangling` | | Checks for vias that are unconnected or connected on only one layer. This constraint does not take a min/opt/max value. In combination with a severity clause, this constraint can be used to allow or disallow dangling vias in various conditions.
| | `zone_connection` | `solid`
`thermal_reliefs`
`none` | Specifies the connection to be made between a zone and a pad.
| diff --git a/pcbnew/drc/drc_rule.h b/pcbnew/drc/drc_rule.h index 0d2248cccc..091d034281 100644 --- a/pcbnew/drc/drc_rule.h +++ b/pcbnew/drc/drc_rule.h @@ -80,7 +80,7 @@ enum DRC_CONSTRAINT_T CONNECTION_WIDTH_CONSTRAINT, TRACK_ANGLE_CONSTRAINT, VIA_DANGLING_CONSTRAINT - PAD_FANOUT_WIDTH_CONSTRAINT + PAD_FANOUT_RATIO_CONSTRAINT, }; diff --git a/pcbnew/drc/drc_rule_parser.cpp b/pcbnew/drc/drc_rule_parser.cpp index 45516b291d..e1beae12f1 100644 --- a/pcbnew/drc/drc_rule_parser.cpp +++ b/pcbnew/drc/drc_rule_parser.cpp @@ -518,7 +518,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule ) case T_track_width: c.m_Type = TRACK_WIDTH_CONSTRAINT; break; case T_track_angle: c.m_Type = TRACK_ANGLE_CONSTRAINT; break; case T_track_segment_length: c.m_Type = TRACK_SEGMENT_LENGTH_CONSTRAINT; break; - case T_pad_fanout_width: c.m_Type = PAD_FANOUT_WIDTH_CONSTRAINT; break; + case T_pad_fanout_ratio: c.m_Type = PAD_FANOUT_RATIO_CONSTRAINT; break; case T_connection_width: c.m_Type = CONNECTION_WIDTH_CONSTRAINT; break; case T_annular_width: c.m_Type = ANNULAR_WIDTH_CONSTRAINT; break; case T_via_diameter: c.m_Type = VIA_DIAMETER_CONSTRAINT; break; @@ -560,7 +560,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule ) || c.m_Type == MIN_RESOLVED_SPOKES_CONSTRAINT || c.m_Type == TRACK_ANGLE_CONSTRAINT || c.m_Type == VIA_DANGLING_CONSTRAINT - || c.m_Type == PAD_FANOUT_WIDTH_CONSTRAINT; + || c.m_Type == PAD_FANOUT_RATIO_CONSTRAINT; allowsTimeDomain = c.m_Type == LENGTH_CONSTRAINT || c.m_Type == SKEW_CONSTRAINT; diff --git a/pcbnew/drc/drc_test_provider_pad_fanout_width.cpp b/pcbnew/drc/drc_test_provider_pad_fanout_width.cpp index 5ca7abdb18..48c62ed0ac 100644 --- a/pcbnew/drc/drc_test_provider_pad_fanout_width.cpp +++ b/pcbnew/drc/drc_test_provider_pad_fanout_width.cpp @@ -70,7 +70,7 @@ bool DRC_TEST_PROVIDER_PAD_FANOUT_WIDTH::Run() return true; // continue with other tests } - if( !m_drcEngine->HasRulesForConstraintType( PAD_FANOUT_WIDTH_CONSTRAINT ) ) + if( !m_drcEngine->HasRulesForConstraintType( PAD_FANOUT_RATIO_CONSTRAINT ) ) { reportAux( wxT( "No pad fanout constraints found. Tests not run." ) ); return true; // continue with other tests @@ -120,8 +120,7 @@ bool DRC_TEST_PROVIDER_PAD_FANOUT_WIDTH::Run() { continue; } - - auto constraint = m_drcEngine->EvalRules( PAD_FANOUT_WIDTH_CONSTRAINT, pad, other, + auto constraint = m_drcEngine->EvalRules( PAD_FANOUT_RATIO_CONSTRAINT, pad, other, pad->GetLayer() ); int constraintWidth = 0; diff --git a/pcbnew/tools/board_inspection_tool.cpp b/pcbnew/tools/board_inspection_tool.cpp index 05ac3bd20c..d9dbf89a45 100644 --- a/pcbnew/tools/board_inspection_tool.cpp +++ b/pcbnew/tools/board_inspection_tool.cpp @@ -454,7 +454,7 @@ void BOARD_INSPECTION_TOOL::InspectDRCError( const std::shared_ptr& aDR if( compileError ) reportCompileError( r ); - constraint = drcEngine->EvalRules( PAD_FANOUT_WIDTH_CONSTRAINT, a, b, layer, r ); + constraint = drcEngine->EvalRules( PAD_FANOUT_RATIO_CONSTRAINT, a, b, layer, r ); r->Report( "" ); r->Report( wxString::Format( _( "Resolved fanout width constraints: min %s; max %s." ),