mirror of
https://gitlab.com/kicad/code/kicad.git
synced 2025-09-14 02:03:12 +02:00
d9a243d98c
This means that you can run just a single case from the command line, for example: `qa_pcbnew -t DRCCopperSliver/_0` The case is also automatically printed as context. This means that when isolating a specific defect in one case, you can run only that one case, which is useful under debuggers and also when using slow tools like valgrind. Not all possibe tests are doing this, but they're easy to do when needed (i.e. when you want to run just one case)
300 lines
8.5 KiB
C++
300 lines
8.5 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2023 Roberto Fernandez Bautista <roberto.fer.bau@gmail.com>
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* Copyright The KiCad Developers, see AUTHORS.txt for contributors.
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*
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* This program is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <qa_utils/wx_utils/unit_test_utils.h>
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#include <boost/test/data/test_case.hpp>
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#include <pcbnew_utils/board_test_utils.h>
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#include <pcbnew_utils/board_file_utils.h>
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#include <pcbnew/pcb_io/pcb_io.h>
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#include <pcbnew/pcb_io/pcb_io_mgr.h>
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BOOST_AUTO_TEST_SUITE( IOMGR )
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struct PCB_IO_PLUGIN_CASE
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{
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std::string m_case_name;
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std::string m_file_rel_path;
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PCB_IO_MGR::PCB_FILE_T m_expected_type;
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friend std::ostream& operator<<( std::ostream& os, const PCB_IO_PLUGIN_CASE& aCase )
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{
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os << aCase.m_case_name;
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return os;
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}
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};
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// clang-format off
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static const std::vector<PCB_IO_PLUGIN_CASE> BoardPluginCases = {
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//
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// FAKE Boards (should return FILE_TYPE_NONE):
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//
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{
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"Fake Board file (KiCad *Legacy* / EAGLE file ext)",
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"plugins/fakeboard.brd",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (KiCad file ext)",
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"plugins/fakeboard.kicad_pcb",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (PCAD file ext)",
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"plugins/fakeboard.pcb",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (CADSTAR file ext)",
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"plugins/fakeboard.cpa",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (Altium Circuit Studio file ext)",
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"plugins/fakeboard.CSPcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (Altium Circuit Maker file ext)",
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"plugins/fakeboard.CMPcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (Altium Designer file ext)",
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"plugins/fakeboard.PcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Fake Board file (Solid Works PCB file ext)",
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"plugins/fakeboard.SWPcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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//
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// REAL Boards:
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//
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{
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"Basic KiCad *Legacy* board file",
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"plugins/legacy_demos/flat_hierarchy/flat_hierarchy.brd",
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PCB_IO_MGR::LEGACY
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},
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{
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"Basic KiCad board file",
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"complex_hierarchy.kicad_pcb",
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PCB_IO_MGR::KICAD_SEXP
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},
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{
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"Basic Eagle board file",
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"plugins/eagle/Adafruit-AHT20-PCB/Adafruit AHT20 Temperature & Humidity.brd",
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PCB_IO_MGR::EAGLE
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},
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{
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"Basic PCAD board file",
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"plugins/pcad/pcad_4layer_glyph_test_ascii.PCB",
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PCB_IO_MGR::PCAD
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},
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{
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"Basic CADSTAR board file",
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"plugins/cadstar/route_offset/minimal_route_offset_curved_track.cpa",
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PCB_IO_MGR::CADSTAR_PCB_ARCHIVE
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},
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{
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"Basic EasyEDA Std board json file",
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"plugins/easyeda/PCB_USBMETER-PD QC修改版_2023-09-02.json",
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PCB_IO_MGR::EASYEDA
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},
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{
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"Basic EasyEDA Std backup file",
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"plugins/easyeda/BackupProjects_ESP32-PICO-D4_smart_watch.zip",
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PCB_IO_MGR::EASYEDA
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},
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{
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"Basic EasyEDA Pro zip board project",
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"plugins/easyedapro/Scanning Tunneling Microscope OpenSTM ControlBoard.zip",
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PCB_IO_MGR::EASYEDAPRO
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},
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{
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"Basic EasyEDA Pro epro project",
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"plugins/easyedapro/ProProject_Yuzuki Chameleon_2023-09-02.epro",
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PCB_IO_MGR::EASYEDAPRO
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},
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{
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"Basic Altium Designer board file",
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"plugins/altium/eDP_adapter_dvt1_source/eDP_adapter_dvt1.PcbDoc",
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PCB_IO_MGR::ALTIUM_DESIGNER
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}
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// Todo: Add Altium derivatives and Fabmaster tests
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};
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static const std::vector<PCB_IO_PLUGIN_CASE> LibraryPluginCases = {
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//
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// NOT libraries (should return FILE_TYPE_NONE):
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//
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{
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"Non-Library file (KiCad *Legacy* / EAGLE file ext)",
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"plugins/fakeboard.brd",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (KiCad file ext)",
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"plugins/fakeboard.kicad_pcb",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (PCAD file ext)",
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"plugins/fakeboard.pcb",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (CADSTAR file ext)",
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"plugins/fakeboard.cpa",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (Altium Circuit Studio file ext)",
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"plugins/fakeboard.CSPcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (Altium Circuit Maker file ext)",
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"plugins/fakeboard.CMPcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (Altium Designer file ext)",
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"plugins/fakeboard.PcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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{
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"Non-Library file (Solid Works PCB file ext)",
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"plugins/fakeboard.SWPcbDoc",
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PCB_IO_MGR::FILE_TYPE_NONE
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},
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//
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// REAL Libraries:
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//
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{
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"Basic KiCad footprint .pretty library",
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"plugins/eagle/lbr/SparkFun-GPS.pretty",
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PCB_IO_MGR::KICAD_SEXP
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},
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{
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"Basic Eagle library file",
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"plugins/eagle/lbr/SparkFun-GPS.lbr",
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PCB_IO_MGR::EAGLE
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},
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{
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"Basic CADSTAR PCB Archive library file",
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"plugins/cadstar/lib/footprint-with-thermal-pad.cpa",
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PCB_IO_MGR::CADSTAR_PCB_ARCHIVE
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},
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{
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"Basic EasyEDA Std board json file",
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"plugins/easyeda/PCB_USBMETER-PD QC修改版_2023-09-02.json",
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PCB_IO_MGR::EASYEDA
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},
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{
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"Basic EasyEDA Std backup file",
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"plugins/easyeda/BackupProjects_ESP32-PICO-D4_smart_watch.zip",
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PCB_IO_MGR::EASYEDA
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},
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{
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"Basic EasyEDA Pro zip board project",
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"plugins/easyedapro/Scanning Tunneling Microscope OpenSTM ControlBoard.zip",
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PCB_IO_MGR::EASYEDAPRO
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},
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{
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"Basic EasyEDA Pro epro project",
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"plugins/easyedapro/ProProject_Yuzuki Chameleon_2023-09-02.epro",
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PCB_IO_MGR::EASYEDAPRO
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},
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{
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"Altium Designer 'Espressif ESP32-WROOM-32.PcbLib' library file",
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"plugins/altium/pcblib/Espressif ESP32-WROOM-32.PcbLib",
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PCB_IO_MGR::ALTIUM_DESIGNER
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},
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{
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"Altium Designer 'Tracks.v6.PcbLib' library file",
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"plugins/altium/pcblib/Tracks.v6.PcbLib",
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PCB_IO_MGR::ALTIUM_DESIGNER
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}
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// Todo: Add Altium derivatives and Fabmaster tests
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};
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// clang-format on
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BOOST_DATA_TEST_CASE( FindBoardPluginType, boost::unit_test::data::make( BoardPluginCases ), c )
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{
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wxString dataPath =
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wxString::FromUTF8( KI_TEST::GetPcbnewTestDataDir() + c.m_file_rel_path );
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BOOST_CHECK_EQUAL( PCB_IO_MGR::FindPluginTypeFromBoardPath( dataPath ),
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c.m_expected_type );
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// Todo add tests to check if it still works with upper/lower case ext.
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// ( FindPluginTypeFromBoardPath should be case insensitive)
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}
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BOOST_DATA_TEST_CASE( GuessLibraryPluginType, boost::unit_test::data::make( LibraryPluginCases ), c )
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{
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wxString dataPath =
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wxString::FromUTF8( KI_TEST::GetPcbnewTestDataDir() + c.m_file_rel_path );
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BOOST_CHECK_EQUAL( PCB_IO_MGR::GuessPluginTypeFromLibPath( dataPath ), c.m_expected_type );
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// Todo add tests to check if it still works with upper/lower case ext.
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// ( GuessPluginTypeFromLibPath should be case insensitive)
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}
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BOOST_DATA_TEST_CASE( CheckCanReadBoard, boost::unit_test::data::make( BoardPluginCases ), c )
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{
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wxString dataPath =
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wxString::FromUTF8( KI_TEST::GetPcbnewTestDataDir() + c.m_file_rel_path );
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auto& pluginEntries = PCB_IO_MGR::PLUGIN_REGISTRY::Instance()->AllPlugins();
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for( auto& entry : pluginEntries )
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{
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BOOST_TEST_CONTEXT( entry.m_name )
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{
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auto plugin = IO_RELEASER<PCB_IO>( PCB_IO_MGR::PluginFind( entry.m_type ) );
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bool expectValidHeader = c.m_expected_type == entry.m_type;
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BOOST_CHECK_EQUAL( plugin->CanReadBoard( dataPath ), expectValidHeader );
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}
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}
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}
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BOOST_AUTO_TEST_SUITE_END()
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