kicad-source/demos/flat_hierarchy/flat_hierarchy.pro
Dick Hollenbeck 8ccf0320b4 1) Add "rules" to base of tree for copying into BZR_HOME/rules.
File "rules" has instructional text as comments near top.

2) Convert all text files in repo to LF line ending form.
   Any checkout done with "rules" in play will convert the working
   tree to native line ending, while keeping repo as LF line ending.
2013-05-25 23:36:44 -05:00

77 lines
938 B
INI

update=07/03/2011 07:10:44
last_client=cvpcb
[general]
version=1
RootSch=pic_programmer.sch
BoardNm=pic_programmer.brd
[common]
NetDir=
[pcbnew]
version=1
PadDril=400
PadDimH=700
PadDimV=700
PadForm=1
PadMask=14745599
ViaDiam=650
ViaDril=250
Isol=100
Countlayer=2
Lpiste=250
RouteTo=15
RouteBo=0
TypeVia=3
Segm45=1
Racc45=1
Unite=0
SegFill=1
SegAffG=0
NewAffG=1
PadFill=1
PadAffG=1
PadSNum=1
ModAffC=1
ModAffT=1
PcbAffT=1
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
HPGLnum=1
HPGdiam=15
HPGLSpd=20
HPGLrec=2
HPGLorg=0
GERBmin=15
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=150
ForPlot=1
WpenSer=10
UserGrX=0,01
UserGrY=0,01
UserGrU=1
DivGrPc=1
TimeOut=600
MaxLnkS=3
ShowRat=0
ShowMRa=1
[pcbnew/libraries]
LibName1=connect
LibName2=discret
LibName3=pin_array
LibName4=divers
LibName5=libcms
LibName6=display
LibName7=dip_sockets
LibDir=
[cvpcb]
version=1
NetIExt=.net
[cvpcb/libraries]
EquName1=devcms