mirror of
https://gitlab.com/kicad/code/kicad.git
synced 2025-09-14 02:03:12 +02:00
Put the string manipuuation utils in the cpp, and remove string_utils.h from the includes of netinfo.h. This spams that header into about 350 files, not all of which need it. Then go round and tidy up the places (most exporters and dialogs) where CPP files weren't including string_utils.h when they used it, as well as some other order-sensitive include issues that turned up.
437 lines
12 KiB
C++
437 lines
12 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright The KiCad Developers, see AUTHORS.txt for contributors.
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* Author: SYSUEric <jzzhuang666@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "odb_eda_data.h"
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#include <base_units.h>
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#include <build_version.h>
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#include <hash_eda.h>
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#include <string_utils.h>
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#include <netinfo.h>
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#include <odb_feature.h>
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#include <pcb_io_odbpp.h>
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EDA_DATA::EDA_DATA()
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{
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auto& x = nets_map.emplace( std::piecewise_construct, std::forward_as_tuple( 0 ),
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std::forward_as_tuple( nets.size(), "$NONE$" ) )
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.first->second;
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nets.push_back( &x );
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}
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void EDA_DATA::NET::Write( std::ostream& ost ) const
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{
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ost << "NET " << m_name;
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WriteAttributes( ost );
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ost << std::endl;
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for( const auto& subnet : subnets )
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{
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subnet->Write( ost );
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}
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}
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void EDA_DATA::AddNET( const NETINFO_ITEM* aNet )
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{
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if( nets_map.end() == nets_map.find( aNet->GetNetCode() ) )
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{
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wxString netName = aNet->GetNetname();
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ODB::RemoveWhitespace( netName );
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auto& net = nets_map.emplace( std::piecewise_construct,
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std::forward_as_tuple( aNet->GetNetCode() ),
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std::forward_as_tuple( nets.size(), netName ) )
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.first->second;
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nets.push_back( &net );
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//TODO: netname check
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}
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}
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void EDA_DATA::SUB_NET::Write( std::ostream& ost ) const
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{
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ost << "SNT ";
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WriteSubnet( ost );
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ost << std::endl;
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for( const auto& fid : feature_ids )
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{
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fid.Write( ost );
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}
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}
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void EDA_DATA::FEATURE_ID::Write( std::ostream& ost ) const
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{
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static const std::map<TYPE, std::string> type_map = {
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{ TYPE::COPPER, "C" },
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{ TYPE::HOLE, "H" },
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};
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ost << "FID " << type_map.at( type ) << " " << layer << " " << feature_id << std::endl;
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}
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void EDA_DATA::SUB_NET_VIA::WriteSubnet( std::ostream& ost ) const
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{
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ost << "VIA";
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}
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void EDA_DATA::SUB_NET_TRACE::WriteSubnet( std::ostream& ost ) const
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{
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ost << "TRC";
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}
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void EDA_DATA::SUB_NET_PLANE::WriteSubnet( std::ostream& ost ) const
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{
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static const std::map<FILL_TYPE, std::string> fill_type_map = { { FILL_TYPE::SOLID, "S" },
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{ FILL_TYPE::OUTLINE, "O" } };
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static const std::map<CUTOUT_TYPE, std::string> cutout_type_map = {
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{ CUTOUT_TYPE::CIRCLE, "C" },
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{ CUTOUT_TYPE::RECT, "R" },
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{ CUTOUT_TYPE::OCTAGON, "O" },
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{ CUTOUT_TYPE::EXACT, "E" }
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};
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ost << "PLN " << fill_type_map.at( fill_type ) << " " << cutout_type_map.at( cutout_type )
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<< " " << fill_size;
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}
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void EDA_DATA::SUB_NET_TOEPRINT::WriteSubnet( std::ostream& ost ) const
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{
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static const std::map<SIDE, std::string> side_map = {
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{ SIDE::BOTTOM, "B" },
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{ SIDE::TOP, "T" },
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};
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ost << "TOP " << side_map.at( side ) << " " << comp_num << " " << toep_num;
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}
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void EDA_DATA::SUB_NET::AddFeatureID( FEATURE_ID::TYPE type, const wxString& layer,
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size_t feature_id )
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{
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feature_ids.emplace_back( type, m_edadata->GetLyrIdx( layer ), feature_id );
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}
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size_t EDA_DATA::GetLyrIdx( const wxString& aLayer )
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{
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if( layers_map.count( aLayer ) )
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{
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return layers_map.at( aLayer );
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}
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else
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{
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auto idx = layers_map.size();
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layers_map.emplace( aLayer, idx );
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layers.push_back( aLayer );
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return idx;
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}
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}
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void OUTLINE_SQUARE::Write( std::ostream& ost ) const
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{
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ost << "SQ " << ODB::Data2String( m_center.x ) << " " << ODB::Data2String( m_center.y ) << " "
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<< ODB::Data2String( m_halfSide ) << std::endl;
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}
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void OUTLINE_CIRCLE::Write( std::ostream& ost ) const
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{
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ost << "CR " << ODB::Data2String( m_center.x ) << " " << ODB::Data2String( m_center.y ) << " "
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<< ODB::Data2String( m_radius ) << std::endl;
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}
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void OUTLINE_RECT::Write( std::ostream& ost ) const
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{
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ost << "RC " << ODB::Data2String( m_lower_left.x ) << " " << ODB::Data2String( m_lower_left.y )
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<< " " << ODB::Data2String( m_width ) << " " << ODB::Data2String( m_height ) << std::endl;
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}
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void OUTLINE_CONTOUR::Write( std::ostream& ost ) const
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{
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ost << "CT" << std::endl;
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m_surfaces->WriteData( ost );
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ost << "CE" << std::endl;
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}
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void EDA_DATA::AddPackage( const FOOTPRINT* aFp )
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{
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// ODBPP only need unique PACKAGE in PKG record in eda/data file.
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// the PKG index can repeat to be ref in CMP record in component file.
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std::shared_ptr<FOOTPRINT> fp( static_cast<FOOTPRINT*>( aFp->Clone() ) );
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m_eda_footprints.emplace_back( fp );
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fp->SetParentGroup( nullptr );
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fp->SetPosition( { 0, 0 } );
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if( aFp->IsFlipped() )
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{
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// ODB++ needs both flips
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fp->Flip( fp->GetPosition(), FLIP_DIRECTION::LEFT_RIGHT );
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fp->Flip( fp->GetPosition(), FLIP_DIRECTION::TOP_BOTTOM );
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}
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fp->SetOrientation( ANGLE_0 );
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size_t hash = hash_fp_item( fp.get(), HASH_POS | REL_COORD );
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size_t pkg_index = packages_map.size();
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wxString fp_name = fp->GetFPID().GetLibItemName().wx_str();
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ODB::RemoveWhitespace( fp_name );
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if( fp_name.IsEmpty() )
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fp_name = wxS( "__" );
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auto [iter, success] = packages_map.emplace( hash, PACKAGE( pkg_index, fp_name ) );
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if( !success )
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{
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return;
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}
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PACKAGE* pkg = &( iter->second );
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packages.push_back( pkg );
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BOX2I bbox = fp->GetBoundingBox();
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pkg->m_xmin = bbox.GetPosition().x;
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pkg->m_ymin = bbox.GetPosition().y;
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pkg->m_xmax = bbox.GetEnd().x;
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pkg->m_ymax = bbox.GetEnd().y;
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pkg->m_pitch = UINT64_MAX;
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if( fp->Pads().size() < 2 )
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pkg->m_pitch = pcbIUScale.mmToIU( 1.0 ); // placeholder value
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for( size_t i = 0; i < fp->Pads().size(); ++i )
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{
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const PAD* pad1 = fp->Pads()[i];
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for( size_t j = i + 1; j < fp->Pads().size(); ++j )
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{
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const PAD* pad2 = fp->Pads()[j];
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const uint64_t pin_dist = ( pad1->GetCenter() - pad2->GetCenter() ).EuclideanNorm();
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pkg->m_pitch = std::min( pkg->m_pitch, pin_dist );
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}
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}
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const SHAPE_POLY_SET& courtyard = fp->GetCourtyard( F_CrtYd );
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const SHAPE_POLY_SET& courtyard_back = fp->GetCourtyard( B_CrtYd );
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SHAPE_POLY_SET pkg_outline;
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if( courtyard.OutlineCount() > 0 )
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pkg_outline = courtyard;
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if( courtyard_back.OutlineCount() > 0 )
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{
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pkg_outline = courtyard_back;
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}
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if( !courtyard.OutlineCount() && !courtyard_back.OutlineCount() )
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{
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pkg_outline = fp->GetBoundingHull();
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}
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// TODO: Here we put rect, square, and circle, all as polygon
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if( pkg_outline.OutlineCount() > 0 )
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{
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for( int ii = 0; ii < pkg_outline.OutlineCount(); ++ii )
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{
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pkg->m_pkgOutlines.push_back(
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std::make_unique<OUTLINE_CONTOUR>( pkg_outline.Polygon( ii ) ) );
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}
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}
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for( size_t i = 0; i < fp->Pads().size(); ++i )
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{
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const PAD* pad = fp->Pads()[i];
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pkg->AddPin( pad, i );
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}
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return;
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}
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void EDA_DATA::PACKAGE::AddPin( const PAD* aPad, size_t aPinNum )
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{
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wxString name = aPad->GetNumber();
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// ODB is unhappy with whitespace in most places
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ODB::RemoveWhitespace( name );
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// Pins are required to have names, so if our pad doesn't have a name, we need to
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// generate one that is unique
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if( aPad->GetAttribute() == PAD_ATTRIB::NPTH )
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name = wxString::Format( "NPTH%zu", aPinNum );
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else if( name.empty() )
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name = wxString::Format( "PAD%zu", aPinNum );
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// // for SNT record, pad, net, pin
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std::shared_ptr<PIN> pin = std::make_shared<PIN>( m_pinsVec.size(), name );
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m_pinsVec.push_back( pin );
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VECTOR2D relpos = aPad->GetFPRelativePosition();
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pin->m_center = ODB::AddXY( relpos );
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if( aPad->HasHole() )
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{
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pin->type = PIN::TYPE::THROUGH_HOLE;
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}
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else
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{
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pin->type = PIN::TYPE::SURFACE;
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}
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if( aPad->GetAttribute() == PAD_ATTRIB::NPTH )
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pin->etype = PIN::ELECTRICAL_TYPE::MECHANICAL;
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else if( aPad->IsOnCopperLayer() )
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pin->etype = PIN::ELECTRICAL_TYPE::ELECTRICAL;
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else
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pin->etype = PIN::ELECTRICAL_TYPE::UNDEFINED;
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if( ( aPad->HasHole() && aPad->IsOnCopperLayer() ) || aPad->GetAttribute() == PAD_ATTRIB::PTH )
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{
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pin->mtype = PIN::MOUNT_TYPE::THROUGH_HOLE;
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}
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else if( aPad->HasHole() && aPad->GetAttribute() == PAD_ATTRIB::NPTH )
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{
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pin->mtype = PIN::MOUNT_TYPE::HOLE;
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}
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else if( aPad->GetAttribute() == PAD_ATTRIB::SMD )
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{
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pin->mtype = PIN::MOUNT_TYPE::SMT;
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}
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else
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{
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pin->mtype = PIN::MOUNT_TYPE::UNDEFINED;
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}
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const std::shared_ptr<SHAPE_POLY_SET>& polygons =
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aPad->GetEffectivePolygon( PADSTACK::ALL_LAYERS, ERROR_INSIDE );
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// TODO: Here we put all pad shapes as polygonl, we should switch by pad shape
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// Note:pad only use polygons->Polygon(0),
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if( polygons->OutlineCount() > 0 )
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{
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pin->m_pinOutlines.push_back( std::make_unique<OUTLINE_CONTOUR>( polygons->Polygon( 0 ) ) );
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}
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}
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void EDA_DATA::PIN::Write( std::ostream& ost ) const
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{
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static const std::map<TYPE, std::string> type_map = { { TYPE::SURFACE, "S" },
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{ TYPE::THROUGH_HOLE, "T" },
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{ TYPE::BLIND, "B" } };
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static const std::map<ELECTRICAL_TYPE, std::string> etype_map = {
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{ ELECTRICAL_TYPE::ELECTRICAL, "E" },
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{ ELECTRICAL_TYPE::MECHANICAL, "M" },
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{ ELECTRICAL_TYPE::UNDEFINED, "U" }
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};
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static const std::map<MOUNT_TYPE, std::string> mtype_map = { { MOUNT_TYPE::THROUGH_HOLE, "T" },
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{ MOUNT_TYPE::HOLE, "H" },
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{ MOUNT_TYPE::SMT, "S" },
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{ MOUNT_TYPE::UNDEFINED, "U" } };
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ost << "PIN " << m_name << " " << type_map.at( type ) << " " << m_center.first << " "
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<< m_center.second << " 0 " << etype_map.at( etype ) << " " << mtype_map.at( mtype )
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<< std::endl;
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for( const auto& outline : m_pinOutlines )
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{
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outline->Write( ost );
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}
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}
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void EDA_DATA::PACKAGE::Write( std::ostream& ost ) const
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{
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ost << "PKG " << m_name << " " << ODB::Data2String( m_pitch ) << " "
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<< ODB::Data2String( m_xmin ) << " " << ODB::Data2String( m_ymin ) << " "
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<< ODB::Data2String( m_xmax ) << " " << ODB::Data2String( m_ymax ) << ";" << std::endl;
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for( const auto& outline : m_pkgOutlines )
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{
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outline->Write( ost );
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}
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for( const auto& pin : m_pinsVec )
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{
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pin->Write( ost );
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}
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}
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void EDA_DATA::Write( std::ostream& ost ) const
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{
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ost << "# " << wxDateTime::Now().FormatISOCombined() << std::endl;
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ost << "HDR KiCad EDA " << TO_UTF8( GetBuildVersion() ) << std::endl;
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ost << "UNITS=" << PCB_IO_ODBPP::m_unitsStr << std::endl;
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ost << "LYR";
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for( const auto& layer : layers )
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{
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ost << " " << layer;
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}
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ost << std::endl;
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WriteAttributes( ost, "#" );
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for( const auto& net : nets )
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{
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ost << "#NET " << net->m_index << std::endl;
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net->Write( ost );
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}
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size_t i = 0;
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for( const auto* pkg : packages )
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{
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ost << "# PKG " << i << std::endl;
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i++;
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pkg->Write( ost );
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ost << "#" << std::endl;
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}
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}
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