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https://gitlab.com/kicad/code/kicad.git
synced 2025-09-14 02:03:12 +02:00
design blocks/multichannel: make apply layout do routing, etc.
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2f88ee9dee
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92ef03cf15
@ -2630,6 +2630,9 @@ void PCB_IO_KICAD_SEXPR::format( const ZONE* aZone ) const
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case PLACEMENT_SOURCE_T::GROUP_PLACEMENT:
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m_out->Print( "(group %s)", m_out->Quotew( aZone->GetPlacementAreaSource() ).c_str() );
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break;
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// These are transitory and should not be saved
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case PLACEMENT_SOURCE_T::DESIGN_BLOCK:
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break;
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}
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m_out->Print( ")" );
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@ -80,6 +80,21 @@ bool MULTICHANNEL_TOOL::findComponentsInRuleArea( RULE_AREA* aRuleAre
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if( !aRuleArea || !aRuleArea->m_zone )
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return false;
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// When we're copying the layout of a design block, we are provided an exact list of items
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// rather than querying the board for items that are inside the area.
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if( aRuleArea->m_sourceType == PLACEMENT_SOURCE_T::DESIGN_BLOCK )
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{
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// Get all board connected items that are from the design bloc
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for( EDA_ITEM* item : aRuleArea->m_designBlockItems )
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{
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if( item->Type() == PCB_FOOTPRINT_T )
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aComponents.insert( static_cast<FOOTPRINT*>( item ) );
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}
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return (int) aComponents.size();
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}
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PCBEXPR_COMPILER compiler( new PCBEXPR_UNIT_RESOLVER );
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PCBEXPR_UCODE ucode;
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PCBEXPR_CONTEXT ctx, preflightCtx;
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@ -110,6 +125,9 @@ bool MULTICHANNEL_TOOL::findComponentsInRuleArea( RULE_AREA* aRuleAre
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case PLACEMENT_SOURCE_T::GROUP_PLACEMENT:
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ruleText = wxT( "A.memberOfGroup('" ) + aRuleArea->m_zone->GetPlacementAreaSource() + wxT( "')" );
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break;
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case PLACEMENT_SOURCE_T::DESIGN_BLOCK:
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// For design blocks, handled above outside the rules system
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break;
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}
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auto ok = compiler.Compile( ruleText, &ucode, &preflightCtx );
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@ -141,6 +159,27 @@ bool MULTICHANNEL_TOOL::findOtherItemsInRuleArea( RULE_AREA* aRuleArea, std::set
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if( !aRuleArea || !aRuleArea->m_zone )
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return false;
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// When we're copying the layout of a design block, we are provided an exact list of items
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// rather than querying the board for items that are inside the area.
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if( aRuleArea->m_sourceType == PLACEMENT_SOURCE_T::DESIGN_BLOCK )
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{
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// Get all board items that aren't footprints or connected items,
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// since they'll be handled in the the other findXInRuleArea routines
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for( EDA_ITEM* item : aRuleArea->m_designBlockItems )
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{
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if( item->Type() == PCB_FOOTPRINT_T )
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continue;
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if( dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
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continue;
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if( item->IsBOARD_ITEM() )
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aItems.insert( static_cast<BOARD_ITEM*>( item ) );
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}
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return (int) aItems.size();
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}
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std::vector<BOARD_ITEM*> result;
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PCBEXPR_COMPILER compiler( new PCBEXPR_UNIT_RESOLVER );
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@ -660,11 +699,28 @@ int MULTICHANNEL_TOOL::findRoutingInRuleArea( RULE_AREA* aRuleArea, std::set<BOA
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std::shared_ptr<CONNECTIVITY_DATA> aConnectivity,
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const SHAPE_POLY_SET& aRAPoly, const REPEAT_LAYOUT_OPTIONS& aOpts ) const
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{
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if( !aRuleArea || !aRuleArea->m_zone )
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return 0;
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// The user also will consider tracks and vias that are inside the source area but
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// not connected to any of the source pads to count as "routing" (e.g. stitching vias)
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int count = 0;
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// When we're copying the layout of a design block, we are provided an exact list of items
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// rather than querying the board for items that are inside the area.
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if( aRuleArea->m_sourceType == PLACEMENT_SOURCE_T::DESIGN_BLOCK )
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{
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// Get all board connected items that are from the design bloc
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for( EDA_ITEM* item : aRuleArea->m_designBlockItems )
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{
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if( BOARD_CONNECTED_ITEM* bci = dynamic_cast<BOARD_CONNECTED_ITEM*>( item ) )
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aOutput.insert( bci );
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}
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return (int) aOutput.size();
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}
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PCBEXPR_COMPILER compiler( new PCBEXPR_UNIT_RESOLVER );
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PCBEXPR_UCODE ucode;
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PCBEXPR_CONTEXT ctx, preflightCtx;
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@ -69,6 +69,7 @@ struct RULE_AREA
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ZONE* m_oldZone = nullptr;
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ZONE* m_zone = nullptr;
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std::set<FOOTPRINT*> m_components;
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std::unordered_set<EDA_ITEM*> m_designBlockItems;
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bool m_existsAlready = false;
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bool m_generateEnabled = false;
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wxString m_sheetPath;
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@ -1419,7 +1419,7 @@ int PCB_CONTROL::ApplyDesignBlockLayout( const TOOL_EVENT& aEvent )
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// If we succeeded in placing the linked design block, we're ready to apply the multichannel tool
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if( m_toolMgr->RunSynchronousAction( PCB_ACTIONS::placeLinkedDesignBlock, &tempCommit, &placementPos ) )
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{
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// Make a lambda for the bounding box of all the components
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// Lambda for the bounding box of all the components
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auto generateBoundingBox = [&]( std::unordered_set<EDA_ITEM*> aItems )
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{
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std::vector<VECTOR2I> bbCorners;
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@ -1440,30 +1440,20 @@ int PCB_CONTROL::ApplyDesignBlockLayout( const TOOL_EVENT& aEvent )
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return KIGEOM::RectifyPolygon( hull );
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};
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// Build an outline that is the entire board editor since a design block can
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// have anything within this space
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SHAPE_LINE_CHAIN wholeEditorOutline;
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wholeEditorOutline.Append( VECTOR2I( -INT_MAX, -INT_MAX ) );
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wholeEditorOutline.Append( VECTOR2I( INT_MAX, -INT_MAX ) );
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wholeEditorOutline.Append( VECTOR2I( INT_MAX, INT_MAX ) );
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wholeEditorOutline.Append( VECTOR2I( -INT_MAX, INT_MAX ) );
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wholeEditorOutline.SetClosed( true );
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// Build a rule area that contains all the components in the design block,
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// meaning all items without SKIP_STRUCT set.
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RULE_AREA dbRA;
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dbRA.m_sourceType = PLACEMENT_SOURCE_T::GROUP_PLACEMENT;
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dbRA.m_sourceType = PLACEMENT_SOURCE_T::DESIGN_BLOCK;
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dbRA.m_generateEnabled = true;
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// Add all components that aren't marked MCT_SKIP_STRUCT to ra.m_components
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std::unordered_set<EDA_ITEM*> allDbItems;
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brd->Visit(
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[&]( EDA_ITEM* item, void* data )
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{
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if( !item->HasFlag( MCT_SKIP_STRUCT ) )
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{
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allDbItems.insert( item );
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dbRA.m_designBlockItems.insert( item );
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if( item->Type() == PCB_FOOTPRINT_T )
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dbRA.m_components.insert( static_cast<FOOTPRINT*>( item ) );
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@ -1482,10 +1472,10 @@ int PCB_CONTROL::ApplyDesignBlockLayout( const TOOL_EVENT& aEvent )
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dbRA.m_zone->SetDoNotAllowTracks( false );
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dbRA.m_zone->SetDoNotAllowPads( false );
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dbRA.m_zone->SetDoNotAllowFootprints( false );
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dbRA.m_zone->SetPlacementAreaSourceType( PLACEMENT_SOURCE_T::GROUP_PLACEMENT );
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dbRA.m_zone->SetPlacementAreaSourceType( dbRA.m_sourceType );
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dbRA.m_zone->SetPlacementAreaSource( group->GetDesignBlockLibId().GetUniStringLibId() );
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dbRA.m_zone->SetHatchStyle( ZONE_BORDER_DISPLAY_STYLE::NO_HATCH );
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dbRA.m_zone->AddPolygon( generateBoundingBox( allDbItems ) );
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dbRA.m_zone->AddPolygon( generateBoundingBox( dbRA.m_designBlockItems ) );
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dbRA.m_center = dbRA.m_zone->Outline()->COutline( 0 ).Centre();
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tempCommit.Add( dbRA.m_zone );
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@ -1525,7 +1515,7 @@ int PCB_CONTROL::ApplyDesignBlockLayout( const TOOL_EVENT& aEvent )
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destRA.m_zone->SetDoNotAllowTracks( false );
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destRA.m_zone->SetDoNotAllowPads( false );
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destRA.m_zone->SetDoNotAllowFootprints( false );
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destRA.m_zone->SetPlacementAreaSourceType( PLACEMENT_SOURCE_T::GROUP_PLACEMENT );
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destRA.m_zone->SetPlacementAreaSourceType( destRA.m_sourceType );
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destRA.m_zone->SetPlacementAreaSource( group->GetName() );
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destRA.m_zone->SetHatchStyle( ZONE_BORDER_DISPLAY_STYLE::NO_HATCH );
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destRA.m_zone->AddPolygon( generateBoundingBox( group->GetItems() ) );
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@ -75,7 +75,8 @@ enum class PLACEMENT_SOURCE_T
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{
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SHEETNAME = 0,
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COMPONENT_CLASS,
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GROUP_PLACEMENT
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GROUP_PLACEMENT,
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DESIGN_BLOCK
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};
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/**
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