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pcbnew, appearance control: add entry to enable/disable LAYER_BOARD_OUTLINE_AREA

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This commit is contained in:
jean-pierre charras 2025-06-19 18:18:28 +02:00
parent 01e67d78d6
commit 5d8c8b9c54
8 changed files with 47 additions and 6 deletions
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1
common/lset.cpp
View File

@ -815,6 +815,7 @@ GAL_SET GAL_SET::DefaultVisible()
LAYER_ZONES,
LAYER_FILLED_SHAPES,
LAYER_LOCKED_ITEM_SHADOW,
// LAYER_BOARD_OUTLINE_AREA, // currently hidden by default
LAYER_CONFLICTS_SHADOW
};

3
common/settings/layer_settings_utils.cpp
View File

@ -45,6 +45,7 @@ GAL_SET UserVisbilityLayers()
LAYER_DRC_EXCLUSION,
LAYER_LOCKED_ITEM_SHADOW,
LAYER_CONFLICTS_SHADOW,
LAYER_BOARD_OUTLINE_AREA,
LAYER_DRAWINGSHEET,
LAYER_GRID,
};
@ -76,6 +77,7 @@ GAL_LAYER_ID RenderLayerFromVisibilityLayer( VISIBILITY_LAYER aLayer )
case VISIBILITY_LAYER::DRC_EXCLUSIONS: return LAYER_DRC_EXCLUSION;
case VISIBILITY_LAYER::LOCKED_ITEM_SHADOWS: return LAYER_LOCKED_ITEM_SHADOW;
case VISIBILITY_LAYER::CONFLICT_SHADOWS: return LAYER_CONFLICTS_SHADOW;
case VISIBILITY_LAYER::BOARD_OUTLINE_AREA: return LAYER_BOARD_OUTLINE_AREA;
case VISIBILITY_LAYER::DRAWING_SHEET: return LAYER_DRAWINGSHEET;
case VISIBILITY_LAYER::GRID: return LAYER_GRID;
}
@ -106,6 +108,7 @@ std::optional<VISIBILITY_LAYER> VisibilityLayerFromRenderLayer( GAL_LAYER_ID aLa
case LAYER_DRC_EXCLUSION: return VISIBILITY_LAYER::DRC_EXCLUSIONS;
case LAYER_LOCKED_ITEM_SHADOW: return VISIBILITY_LAYER::LOCKED_ITEM_SHADOWS;
case LAYER_CONFLICTS_SHADOW: return VISIBILITY_LAYER::CONFLICT_SHADOWS;
case LAYER_BOARD_OUTLINE_AREA: return VISIBILITY_LAYER::BOARD_OUTLINE_AREA;
case LAYER_DRAWINGSHEET: return VISIBILITY_LAYER::DRAWING_SHEET;
case LAYER_GRID: return VISIBILITY_LAYER::GRID;
default:

22
demos/kit-dev-coldfire-xilinx_5213/kit-dev-coldfire-xilinx_5213.kicad_pro
View File

@ -243,6 +243,15 @@
"viewports": []
},
"boards": [],
"component_class_settings": {
"assignments": [],
"meta": {
"version": 0
},
"sheet_component_classes": {
"enabled": false
}
},
"cvpcb": {
"equivalence_files": []
},
@ -493,6 +502,7 @@
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"tuning_profile": "",
"via_diameter": 0.6,
"via_drill": 0.4,
"wire_width": 6
@ -511,13 +521,14 @@
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.4,
"tuning_profile": "",
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6
}
],
"meta": {
"version": 4
"version": 5
},
"net_colors": null,
"netclass_assignments": null,
@ -616,6 +627,7 @@
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
"hop_over_size_choice": 1,
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
@ -673,5 +685,11 @@
"inout_user"
]
],
"text_variables": {}
"text_variables": {},
"time_domain_parameters": {
"delay_profiles_user_defined": [],
"meta": {
"version": 0
}
}
}

22
demos/video/video.kicad_pro
View File

@ -243,6 +243,15 @@
"viewports": []
},
"boards": [],
"component_class_settings": {
"assignments": [],
"meta": {
"version": 0
},
"sheet_component_classes": {
"enabled": false
}
},
"cvpcb": {
"equivalence_files": []
},
@ -492,6 +501,7 @@
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"tuning_profile": "",
"via_diameter": 0.889,
"via_drill": 0.4,
"wire_width": 6
@ -510,13 +520,14 @@
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"tuning_profile": "",
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6
}
],
"meta": {
"version": 4
"version": 5
},
"net_colors": null,
"netclass_assignments": null,
@ -621,6 +632,7 @@
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
"hop_over_size_choice": 1,
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
@ -698,5 +710,11 @@
"modul"
]
],
"text_variables": {}
"text_variables": {},
"time_domain_parameters": {
"delay_profiles_user_defined": [],
"meta": {
"version": 0
}
}
}

2
include/layer_ids.h
View File

@ -314,7 +314,7 @@ enum GAL_LAYER_ID: int
LAYER_DRC_SHAPE1 = GAL_LAYER_ID_START + 42, ///< Custom shape for DRC marker.
LAYER_DRC_SHAPE2 = GAL_LAYER_ID_START + 43, ///< Custom shape for DRC marker.
LAYER_BOARD_OUTLINE_AREA = GAL_LAYER_ID_START + 44, ///< PCB board outline
LAYER_BOARD_OUTLINE_AREA = GAL_LAYER_ID_START + 44, ///< PCB board outline
// Add layers below this point that do not have visibility controls, so don't need explicit
// enum values

1
include/settings/layer_settings_utils.h
View File

@ -49,6 +49,7 @@ enum class VISIBILITY_LAYER
DRC_EXCLUSIONS,
LOCKED_ITEM_SHADOWS,
CONFLICT_SHADOWS,
BOARD_OUTLINE_AREA,
DRAWING_SHEET,
GRID
};

1
pcbnew/pcb_draw_panel_gal.cpp
View File

@ -672,7 +672,6 @@ void PCB_DRAW_PANEL_GAL::SyncLayersVisibility( const BOARD* aBoard )
m_view->SetLayerVisible( LAYER_SELECT_OVERLAY, true );
m_view->SetLayerVisible( LAYER_RATSNEST, true );
m_view->SetLayerVisible( LAYER_MARKER_SHADOWS, true );
m_view->SetLayerVisible( LAYER_BOARD_OUTLINE_AREA, true );
m_view->SetLayerVisible( LAYER_DRC_SHAPE1, true );
m_view->SetLayerVisible( LAYER_DRC_SHAPE2, true );
}

1
pcbnew/widgets/appearance_controls.cpp
View File

@ -351,6 +351,7 @@ const APPEARANCE_CONTROLS::APPEARANCE_SETTING APPEARANCE_CONTROLS::s_objectSetti
RR( _HKI( "Anchors" ), LAYER_ANCHOR, _HKI( "Show footprint and text origins as a cross" ) ),
RR( _HKI( "Locked Item Shadow" ), LAYER_LOCKED_ITEM_SHADOW, _HKI( "Show a shadow on locked items" ) ),
RR( _HKI( "Colliding Courtyards" ), LAYER_CONFLICTS_SHADOW, _HKI( "Show colliding footprint courtyards" ) ),
RR( _HKI( "Board Area Shadow" ), LAYER_BOARD_OUTLINE_AREA, _HKI( "Show board area shadow" ) ),
RR( _HKI( "Drawing Sheet" ), LAYER_DRAWINGSHEET, _HKI( "Show drawing sheet borders and title block" ) ),
RR( _HKI( "Grid" ), LAYER_GRID, _HKI( "Show the (x,y) grid dots" ) )
// clang-format on